Senior ASIC DFT & DV Engineer; DVE/Verdi
Listed on 2026-10-17
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Engineering
Test Engineer, Hardware Engineer, Systems Engineer
Cisco’s Silicon One team seeks an experienced hardware test engineer to lead test planning and bench development for Design-for-Test architecture. You will collaborate across design, verification, and PD teams to validate test logic and enable robust in-system testing through post-silicon validation.
The role requires strong System Verilog skills, DVE/Verdi debugging, and scripting in TCL/Python/Perl, with 7+ years of experience (or 4+ if MS) in EE. Hybrid role across San Jose or Austin.
The Senior ASIC DFT & DV Engineer (DVE/Verdi) position in the IT & Technology, Engineering field is open for applications.
Consider building your career as a Senior ASIC DFT & DV Engineer (DVE/Verdi) at Cisco.
We have an opening for a Senior ASIC DFT & DV Engineer (DVE/Verdi) in Austin, TX, United States within IT & Technology, Engineering.
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