Senior DFT-Driven ASIC Verification Engineer
Listed on 2026-10-18
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Engineering
Test Engineer, Quality Engineering, Hardware Engineer
Meta in Austin, Texas, seeks an ASIC Design Verification Engineer specialized in DFT to drive verification closure for data-center silicon. You will develop DFT architectures, build UVM test benches, and ensure testability and manufacturability across IP, sub-system, and SoC levels.
You will collaborate with Design, DFT Architecture, Emulation, and Post-Silicon Validation teams to validate scan, BIST, JTAG, and related structures using simulation, formal analysis, and emulation-based verification
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