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Senior Leader, Signal and Power Integrity​/Systems Architecture; -Speed Interconnects

Job in Austin, Travis County, Texas, 78716, USA
Listing for: Qualcomm
Full Time position
Listed on 2026-10-18
Job specializations:
  • Engineering
    Electrical Engineering, Systems Engineer
Salary/Wage Range or Industry Benchmark: 257000 - 385000 USD Yearly USD 257000.00 385000.00 YEAR
Job Description & How to Apply Below
Position: Senior Leader, Signal and Power Integrity/Systems Architecture (High-Speed Interconnects) - Multiple locations
Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group >
Packaging Engineering

General Summary

Qualcomm Central Hardware Systems (CHS) team is seeking a Senior Leader, Electrical Systems Architect to define, develop, and productize next-generation high-speed electrical interconnect technologies for AI, hyperscale datacenter, networking, and HPC platforms.

Locations include:
Pacific Time Zone - Bay Area Remote;
Portland Remote;
Irvine Remote AND/OR Austin, TX

Key Responsibilities
  • Define and drive end-to-end architecture for next-generation 224G and 448G PAM4 electrical interconnect systems, including Ser Des, package, PCB, connector, cable, CPC, NPC, flyover, and rack-scale connectivity solutions.
  • Lead system-level Signal Integrity (SI) and Power Integrity (PI) strategy, including channel budgeting, COM analysis, insertion loss, return loss, jitter, crosstalk, PDN design, and simulation-to-silicon correlation.
  • Drive architecture, modeling, and optimization of high-speed link technologies spanning PHY/Ser Des architectures, equalization techniques, FEC, channel operating margins, and system performance tradeoffs across bandwidth, reach, power, latency, and reliability.
  • Partner across silicon, package, board, power, and system teams to develop and productize advanced electrical connectivity solutions leveraging advanced packaging, CPC/NPC flyover architectures, and next-generation PCB technologies.
  • Provide technical leadership for future interconnect roadmaps, enabling scalable AI infrastructure through innovations in 224G/448G signaling, SI/PI methodologies, heterogeneous integration, and end-to-end electrical system design.
Required
  • MS or PhD in Electrical Engineering, Computer Engineering, Physics, or related discipline.
  • 15+ years of experience developing high-speed communication, networking, or datacenter infrastructure products.
  • Demonstrated success productizing 112G and/or 224G PAM4 electrical communication systems.
Technical Expertise Deep Expertise In
  • High-speed Ser Des architectures
  • PAM4 communication systems
  • Signal Integrity (SI)
  • Power Integrity (PI)
  • Package, PCB, connector, and cable design
  • Power delivery network architecture
  • Advanced packaging technologies
  • Channel modeling and compliance methodologies
  • End-to-end electrical system architecture
  • AI networking, scale-up, and scale-out infrastructures
Hands-on Experience With

ADS, HFSS, CST, HSPICE, MATLAB, Python, Cadence Sigrity, PowerSI, Clarity, System Verilog, Verilog-A, COM analysis tools, IBIS-AMI modeling

Preferred Qualifications
  • Experience developing and productizing 224G+ and 448G electrical interconnect solutions.
  • Experience with CPC, NPC, copper flyover architectures, AECs, advanced package substrates, and next-generation PCB technologies.
  • Familiarity with Ethernet, PCIe, UALink, NVLink, OIF CEI, IEEE 802.3, and AI networking fabrics.
  • Experience with chiplets, UCIe, heterogeneous integration, EIC/PIC interfaces, and advanced packaging technologies.
  • Track record influencing technology roadmaps, industry standards, and large cross-functional architecture decisions.
  • Proven technical leadership and mentorship of senior engineering teams.
Minimum Qualifications
  • Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 10+ years of System/Package Design/Technology Engineering or related work experience.

OR

Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 9+ years of System/Package Design/Technology Engineering or related work experience.

OR

PhD in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 8+ years of System/Package Design/Technology Engineering or related work experience.

EEO Employer

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the…

Position Requirements
10+ Years work experience
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