Senior ASIC Post-Silicon DFT Lead
Listed on 2026-10-19
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Engineering
Test Engineer, Hardware Engineer
Cisco's Silicon One team is seeking a Senior ASIC Post-Silicon DFT Lead to guide post-silicon bring-up to production. You will collaborate with Reliability, Board, package, and test teams to define DFT requirements early in design and help craft next-generation networking chips.
You will lead the post-silicon validation effort across engineering disciplines and drive process improvements to scale from bring-up to high-volume production, shaping Cisco's AI-era silicon strategy.
This position is for the Senior ASIC Post-Silicon DFT Lead role at Cisco.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior ASIC Post-Silicon DFT Lead role in the description above.
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