Lead RISC‑V CPU Verification Fellow Perf SoC
Listed on 2026-10-20
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Engineering
Test Engineer
Tenstorrent in the United States is seeking a CPU Verification Fellow to lead verification strategy for next-gen RISC-V high-performance processors. Hybrid role based in Santa Clara, CA or Austin, TX, guiding design through tapeout and post-silicon validation.
You will build scalable verification environments, drive test plans, coverage, and scoreboards, and mentor engineers while collaborating with architecture, RTL, and firmware teams.
The following opportunity is for a Lead RISC‑V CPU Verification Fellow — High‑Perf SoC with Curastem.
We are currently recruiting a Lead RISC‑V CPU Verification Fellow — High‑Perf SoC for our team in Austin, TX, United States.
This is a great opening to take on the Lead RISC‑V CPU Verification Fellow — High‑Perf SoC role at Curastem.
As a Lead RISC‑V CPU Verification Fellow — High‑Perf SoC, you will play an important part at Curastem in Austin, TX, United States.
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