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STA Application Engineer

Job in Austin, Travis County, Texas, 78716, USA
Listing for: Cadence
Full Time position Listed on 2026-11-10
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 106400 - 197600 USD Yearly USD 106400.00 197600.00 YEAR

Job Description & How to Apply Below

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  • Perform Static timing analysis, glitch, noise analysis using Tempus Signoff tool.
  • Executing and delivering on various aspects of Timing analysis flows, ECO flows, CAD tools and methodologies.
  • Work on SDC constraints, advanced OCV/SOCV concepts, derates, PBA timing, Distributed and Concurrent STA flows.
  • Work efficiently with R&D and customer to enable various timing analysis & ECO flows including newer advanced technologies.
  • Performing timing correlation, tool feature benchmarking, constraints validation, spice analysis on various tech nodes and customer designs.
  • Work on In-design timing ECO optimizations solutions with basic knowledge of Place and Route, Clock Tree, RC Extraction and UPF/CPF concepts.
  • Execute and lead Tempus timing signoff campaigns at existing and new customers.
  • Automation of flows using scripting languages (Perl, Tcl, python).
  • Deliver technical trainings and seminars within Cadence and customer sites.
  • The annual salary range for California is $106,400 to $197,600. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
  • Paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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