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Semiconductor Digital Architect, Texas Institute Electronics

Job in Austin, Travis County, Texas, 78716, USA
Listing for: Phase2 Technology
Full Time position
Listed on 2025-12-19
Job specializations:
  • IT/Tech
    Systems Engineer
Salary/Wage Range or Industry Benchmark: 60000 - 80000 USD Yearly USD 60000.00 80000.00 YEAR
Job Description & How to Apply Below
Position: Semiconductor Digital Architect, Texas Institute for Electronics

Job Posting

Title:

Semiconductor Digital Architect, Texas Institute for Electronics

Hiring Department: Texas Institute for Electronics

Position Open To: All Applicants

Weekly Scheduled

Hours:

40

FLSA Status: To Be Determined at Offer

Earliest

Start Date:

Ongoing

Position Duration: Expected to Continue

Location: AUSTIN, TX

General Notes

About TIE

Texas Institute for Electronics (TIE) is a transformative, well-funded semiconductor foundry venture combining the agility of a startup with the scale of a national initiative.

Our Mission

A key part of our mission is to advance the state of the art in 3D heterogeneous integration (3

DHI), chiplet-based architectures, and multi-component microsystems- catalyzing breakthroughs across microelectronics, artificial intelligence, quantum computing, high-performance computing, and next-generation healthcare devices.

Our Impact

Backed by $1.4 billion in combined funding from DARPA, Texas state initiatives, and strategic partners, we are building foundational capabilities in advanced packaging and integrated design infrastructure to restore U.S. leadership in microelectronics manufacturing.

Our Technology

Our 3

DHI and chiplet integration platforms integrate novel thermal management and advanced interconnect solutions to deliver unprecedented performance and energy efficiency. Operating at the intersection of defense electronics and commercial markets, TIE offers a rare opportunity to reimagine an industry from the ground up and build transformative products with global impact.

UT Austin, recognized by Forbes as one of America's Best Large Employers, provides outstanding employee benefits and total rewards packages that include:

  • Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
  • Voluntary Vision, Dental, Life, and Disability insurance options
  • Generous paid vacation, sick time, and holidays
  • Teachers Retirement System of Texas, a defined benefit retirement plan, with 8.25% employer matching funds
  • Additional Voluntary Retirement Programs:
    Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
  • Flexible spending account options for medical and childcare expenses
  • Robust free training access through Linked In Learning plus professional conference opportunities
  • Tuition assistance
  • Expansive employee discount program including athletic tickets
  • Free access to UT Austin's libraries and museums with staff
  • Free rides on all UT Shuttle and Austin Cap Metro buses with staff
  • For more details, please see Benefits | Human Resources and UT Austin Employee Experience | Human Resources
Purpose

The purpose of the Semiconductor Digital Architect is to develop next-generation digital subsystems and compute fabrics for 2.5D/3D microsystems, enabling scalable, high-bandwidth integration across AI, HPC, and wireless acceleration platforms. This includes defining architecture specifications, collaborating with teams to optimize performance, and engaging with semiconductor industry partners to shape ecosystem directions.

Responsibilities
  • Architect next-generation digital subsystems and compute fabrics for 2.5D/3D microsystems-enabling scalable, high-bandwidth integration across AI, HPC, and wireless acceleration platforms.
  • Define and optimize architecture specifications, dataflows, and interconnect topologies (chiplet fabrics, No

    Cs, HBM, PCIe/CXL) across heterogeneous dies.
  • Collaborate with EDA, packaging, and system modeling teams to co-optimize digital architectures for performance, power, and reliability.
  • Lead system-level modeling and design-space exploration for AI and signal-processing workloads using simulation and prototyping frameworks.
  • Engage with industry partners and standards bodies (UALink, NVLink Fusion, Ultra Ethernet, CXL 3.x) to shape ecosystem directions.
  • Mentor internal design teams on RTL methodologies, IP integration, and verification best practices for multi-die systems.
  • Translate architectural innovations into roadmaps and reference designs, driving alignment between research, productization, and customer enablement.
  • Other related functions as assigned.
Required Qualifications
  • Master's of Science in Electrical or Computer Engineering.
  • 12 years of…
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