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Design Verification Engineer — Mixed-Signal Automotive SerDes SoCs

Job in Bengaluru, 560001, Bangalore, Karnataka, India
Listing for: Texas Instruments
Full Time position
Listed on 2026-09-29
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer, Test Engineer, Automation & Mechatronics Engineer
Job Description & How to Apply Below
Position: Design Verification Engineer — Mixed-Signal Automotive SerDes SoCs (5–10 Yrs)
Location: Bengaluru

About Texas Instruments

Texas Instruments (TI) is a global semiconductor company designing, manufacturing, and selling analog and embedded processing chips — powering everything from industrial automation to automotive safety systems worldwide.

About the Team — High Speed Data Interface Product Group

The  High Speed Data Interface product group  focuses on the development of differentiated high-speed  Ser Des SoCs  targeted for  automotive and industrial markets . There are two primary focus areas —  Ethernet PHY  and  FPD-Link .

Ethernet PHY Group:  A large number of applications — like in-vehicle driver alertness monitors, steering, or accelerator control in automotive and robotic applications — require an Ethernet interface. The ubiquity of Ethernet-enabled devices allows customers to simplify connecting large numbers of devices in automotive and robotic environments. Customers expect  robust performance  in the presence of interference and ESD events, along with processing offload capabilities.

The low-cost migration from CAN to Ethernet presents unique challenges requiring interdisciplinary skills with aggressive cost and power targets.

FPD-Link Group:  The proprietary  FPD-Link interface  addresses  multi-gigabit (up to 20 Gbps)  automotive and industrial sensor and display markets. Constant increase in density of electronic sensing and display content is pushing data rate (20 Gbps) and BER performance requirements higher. Automotive functional safety requirements demand robust performance at these high data rates under challenging environments while maintaining low power consumption.

The Broader Mission:  As part of this product group, you will be engaged in designing solutions spanning  Analog, Digital, and Signal Processing domains  to mitigate impairments such as high channel loss, ESD strikes, and narrow band interference. The team implements high-performance equalization circuits (CTLE, FFE, DFE), high-speed converters (DAC, ADC), high-speed digital front-ends, signal processing algorithms, embedded microcontrollers, and high-speed interfaces for camera and display systems.

The team has successfully achieved several  differentiated innovations  through collaborative cross-domain optimization.

The  entire product lifecycle  — from product specification to customer and application support — is owned by the product group in  Bangalore , giving each team member tremendous learning opportunity and enhanced scope to  influence the global success of the product . We are looking for  passionate, creative, and self-driven engineers  who challenge traditional techniques and come up with innovative solutions to make a difference.

Role Overview

As a  Design Verification Engineer , you are the last line of defense before silicon. You will lead functional, formal, and system-level verification of complex mixed-signal Ser Des SoCs — ensuring every block, subsystem, and top-level integration meets the stringent quality, safety, and performance requirements of automotive and industrial applications.

Key Responsibilities

Develop comprehensive  Verification Plans  covering block-level, subsystem, and full-chip SoC verification
Build and maintain advanced  UVM test benches  with constrained-random stimulus, functional coverage, and protocol checkers for Ser Des, Ethernet MAC/PHY, and embedded microcontroller subsystems
Apply  assertion-based verification (ABV)  using System Verilog Assertions (SVA) for critical protocol and timing properties
Execute  formal verification  (model checking, property checking) for control logic, FSMs, and safety-critical paths using tools like Jasper Gold or VC Formal
Lead  system-level verification  of mixed-signal SoC integration — incorporating analog behavioral models…
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