Senior Digital Layout Engineer ‑Gen ASICs
Listed on 2026-10-06
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Engineering
Electronics Engineer, Hardware Engineer, Systems Engineer, Electrical Engineering
Apple Inc. in Beaverton, Oregon, seeks an experienced Digital Layout Designer to craft state-of-the-art ASIC layouts.
You will design complex custom digital macros, review floor plans, and work with the circuit and CAD teams to produce robust physical designs for next-generation chips. Ideal candidates bring a decade of layout experience, strong RC delay and electromigration knowledge, and proficiency with CALIBRE/ Mentor Graphics or Cadence tools.
This role is for the Senior Digital Layout Engineer for Next‑Gen ASICs role at Apple Inc.
As a Senior Digital Layout Engineer for Next‑Gen ASICs, you will play an important part at Apple Inc. in Beaverton, OR, United States.
We invite applications for the Senior Digital Layout Engineer for Next‑Gen ASICs position located in Beaverton, OR, United States.
The following role is for a Senior Digital Layout Engineer for Next‑Gen ASICs with Apple Inc.
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