Senior RTL Architect PCIe​/CXL Interconnects

Arm Limited is seeking an experienced RTL/SoC engineer to own microarchitecture and RTL development for high-speed interconnect subsystems, including PCIe, CXL, and UALink. You will translate requirements into microarchitecture specifications and synthesizable RTL, driving integration across multiple silicon products.

You will lead the development process from concept through RTL creation, subsystem integration, verification support, and final delivery, collaborating with architecture,

We are looking to fill the Senior RTL Architect for PCIe/CXL Interconnects position at Arm Limited in United Kingdom.

Are you ready to take on the Senior RTL Architect for PCIe/CXL Interconnects role at Arm Limited?

We would love to welcome a new Senior RTL Architect for PCIe/CXL Interconnects to our group in United Kingdom.

For the Senior RTL Architect for PCIe/CXL Interconnects position at Arm Limited, we are reviewing applications now.