Senior RTL Architect PCIe/CXL Interconnects
Listed on 2026-10-07
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Engineering
Systems Engineer, Hardware Engineer, Electronics Engineer
Arm Limited is seeking an experienced RTL/SoC engineer to own microarchitecture and RTL development for high-speed interconnect subsystems, including PCIe, CXL, and UALink. You will translate requirements into microarchitecture specifications and synthesizable RTL, driving integration across multiple silicon products.
You will lead the development process from concept through RTL creation, subsystem integration, verification support, and final delivery, collaborating with architecture,
We are seeking a motivated Senior RTL Architect for PCIe/CXL Interconnects to join Arm Limited in United Kingdom.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior RTL Architect for PCIe/CXL Interconnects role in the description above.
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