Senior SerDes Validation Engineer

65000 - 75000 United Kingdom Semiconductor, Capital Equipment Permanent Senior Ser Des Validation Engineer We are recruiting on behalf of an innovative technology company for a Senior Ser Des Validation Engineer to join a team developing next-generation satellite communication solutions. This is an exciting opportunity to work on advanced ASICs, high-speed communication interfaces and cutting-edge silicon products.

Key Responsibilities Validate high-speed Ser Des PHYs and execute link bring-up, equalisation and performance testing.

Perform chip and system validation across Process, Voltage and Temperature (PVT) conditions.

Use advanced lab equipment including oscilloscopes, BERT, DCA and PNAX to carry out eye diagram, jitter and stressed eye testing.

Develop and execute chip and system test plans in collaboration with engineering teams.

Create automated test solutions using Python and investigate root causes of validation issues.

Analyse test data, support continuous integration and contribute to product quality improvements.

Requirements Bachelor's or Master's degree in Electronic Engineering, Computer Engineering or a related discipline.

Ideally 8–13 years' post-graduate experience in chip or system validation.

Experience testing telecommunications or satellite systems, including analog, RF and high-speed communication blocks.

Strong knowledge of Ser Des technology, RF fundamentals and communications theory.

Proficiency in Python, C/C++ or similar programming languages for test automation.

Experience with RF test equipment, debugging complex issues, and tools such as JIRA and Confluence.

Excellent problem-solving, communication and teamwork skills, with the ability to thrive in a fast-paced engineering environment.

If you're looking to join a forward-thinking engineering team working on advanced communication technologies, we'd love to hear from you.