ASIC​/FPGA Engineer

ASIC/FPGA Design Engineer

Bloomington, MN

Contract Position

Pay Estimated: $-$119,000/Yearly

This estimate represents the typical salary range for this position based on experience and other factors (geographical location, etc.)

Active Secret Clearance Required to Start

As an ASIC/FPGA Design Engineer, you will define, design, simulate, and verify complex digital hardware solutions using FPGAs and/or ASICs. This role spans architecture definition, RTL development, synthesis, timing analysis, and test planning in support of cutting‑edge defense and aerospace systems. You’ll contribute to critical projects across multiple programs and interface with both internal teams and external customers.

• Define architecture, simulation strategy, and detailed RTL design for ASIC/FPGA systems
• Develop and document module interfaces
  , timing constraints, and device‑level designs
• Perform simulation, synthesis,
  place and route
  , and static timing analysis
• Create and execute test plans to verify functionality and performance
• Analyze results to validate design against requirements (timing, power, area, functionality)
• Collaborate on component selection, including evaluation of foundries, vendors, IP libraries
  , and tool chains
• Support the entire ASIC/FPGA lifecycle
  , following industry and internal standards
• Review design specifications and customer proposals for feasibility and compliance
• Contribute to organizational process improvement and best practices
• May lead tasks and mentor junior engineers within the team
• Work cross-functionally with other engineering domains and project stakeholders

• U.S. Citizenship is required by Federal Law
• Education:
  • Bachelor’s degree in Electrical Engineering, Computer Engineering
    , or related STEM field
  • Master’s degree acceptable with fewer years of experience
• Experience:
  • 5+ years of ASIC/FPGA development experience (or 3+ years with a Master’s)
• Security Clearance:
  • Must be eligible to obtain a DoD Secret clearance at time of hire
• Proficient in VHDL/Verilog/System Verilog for digital design
• Hands‑on experience with ASIC/FPGA design tools
  , including:
  • Simulation (Model Sim, Questa, VCS)
  • Synthesis & P&R (Synopsys, Vivado, Quartus, etc.)
  • Timing analysis & constraints (Prime Time, Time Quest)
• Experience with testbench development and verification planning
• Familiarity with IP integration, constraints management
  , and tool scripting (TCL, Python, etc.)
• Strong understanding of digital logic, SoC design, and FPGA fabric architectures
• Proficiency in Microsoft Office and technical documentation tools

Moseley Technical Services, Inc. is an AA/EEO/Veterans/Disabled Employer.

• Applicants selected for employment will be required to pass a pre‑employment drug screening and background investigation which may include education, criminal and work history verifications.
• Accepted applicants will have the opportunity to be eligible for benefits, including medical and supplemental insurance and a 401K. Appreciation and gratitude for employees is a hallmark of organizations with low turnover.
• Final position level and pay will be based on experience.

• To apply, send resume to:
• For more active job openings:
• For more information about Moseley visit:

Moseley Technical Services, Inc. (Moseley) was incorporated in 1994 to provide engineering and professional services to the aerospace/defense, manufacturing, government, and commercial industries. Our Mission is to deliver superior service to our customers and employees. We have been successful in our vision by building long‑term relationships with customers and employees through integrity, transparency, and appreciation.

We stand by our 30 year‑old commitment of “World Class Service. World Class Company.”