DMTS Process Integration Engineer – Advanced Packaging | Micron, Boise
Listed on 2025-11-29
-
Engineering
Systems Engineer, Electrical Engineering
Home Vacancies DMTS Process Integration Engineer – Advanced Packaging | Micron, Boise
DMTS Process Integration Engineer – Advanced Packaging | Micron, Boise Drive next-gen 3DIC and hybrid bonding integration in advanced memory packaging
July 31, 2025
Micron Boise is hiring a Process Integration Engineer to lead integration strategies for advanced memory packaging. Shape 3
DIC, hybrid bonding, and FO-WLP innovations in next-gen nanotechnology.
Field
Details
Title DMTS Process Integration Engineer – Advanced Package Technology Development (APTD)
Organization Micron Technology, Inc.
Work Location Boise, Idaho, USA
Research Field Nanotechnology, Electronics, Materials Engineering, Electrical Engineering, Mechanical Engineering
Funding Info Industry-funded (Micron)
Final date to receive applications Rolling
Posted Date July 2025
Country United States
Researcher Profile Advanced process integration expert in semiconductors
Required Qualification MS or PhD in Engineering, Physics, Chemistry, or related fields
Required Experience Experience in DRAM/NAND/3
DIC, hybrid bonding, integration, and yield optimization
Salary Details Competitive with US-based benefits
Micron Technology, a global leader in advanced memory and storage, is hiring a DMTS Process Integration Engineer for its Advanced Packaging Technology Development (APTD) team in Boise, Idaho
.
This is a senior role ideal for engineers passionate about nanotechnology, 3
DIC integration, hybrid bonding, and yield enhancement in next-gen memory packaging solutions
. You’ll help define Micron’s packaging roadmap through hands‑on process development, line monitoring, and statistical analysis — all while driving cross‑functional projects in the semiconductor integration space.
About the Team
Micron’s TD division is where groundbreaking innovation begins. From DRAM to 3D NAND and beyond, the TD team transforms novel ideas into manufacturing‑ready solutions, pushing the limits of memory technology through collaborative R&D.
- Lead process integration efforts in 3
DIC, hybrid bonding, FO-WLP, and other packaging innovations - Develop line monitoring methods, yield improvement plans, and statistical process controls
- Design and analyze experiments (DoEs) using advanced analytics and system tools
- Drive cross‑site project coordination, communication, and technology transfer
- Mentor early‑career engineers, lead KT problem‑solving, and contribute to training sessions
- Define contingency plans, build integration flows, and align direction with global teams
- Present findings across teams and publish ECN and change documentation
- Translate design goals into process innovation across integration domains
- MS or PhD in Electrical, Mechanical, Materials, Computer Engineering, Physics, or Chemistry
- Strong background in Advanced Packaging, DRAM, NAND, 3
DIC, hybrid bonding, or FO‑WLP - Proficiency in data analysis, JMP/system tools, and process diagnostics
- Leadership and communication skills across cross‑functional R&D and manufacturing teams
- Adaptability in dynamic, high‑tech environments
Micron offers a collaborative, innovation‑first culture with robust benefits including healthcare plans, paid time off, global learning opportunities, and long‑term career development.
By joining this team, you’ll help bridge the gap between front‑end process development and advanced packaging integration — fueling memory performance and efficiency for AI, 5G, and edge computing systems.
🚨 Disclaimer:
Micron does not charge candidates any fees. AI‑assisted resumes are welcome but must reflect accurate experience. Misrepresentation may lead to disqualification. All applications are subject to Micron’s equal opportunity and labor compliance policies.
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