Process Integration Engineer, APTD

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

The Advanced Packaging Technology Development (APTD) organization develops next-generation packaging and integration technologies for future memory products. We bring together engineers and scientists to overcome complicated integration, performance, and manufacturability challenges. Working across technology development, device engineering, package design, product engineering, reliability, and manufacturing, we turn new concepts into manufacturable solutions for High Bandwidth Memory (HBM) and other advanced memory products.

As a Process Integration Engineer within APTD, you will develop and integrate semiconductor process flows for next-generation memory and packaging technologies, with a focus on Wafer-Level Technology (WLT) and reconstructed substrates returning to wafer-form fab processing. You will lead technical projects, solve exciting integration problems, and work across engineering fields to balance performance, manufacturability, quality, reliability, cost, and schedule. This role is well suited for an engineer who enjoys hands‑on problem solving, collaborative R&D, and using emerging tools such as AI to improve engineering workflows and decision‑making.

• Lead technical integration projects for new memory and advanced packaging technologies
• Design and complete experiments to assess process performance, variability, reliability, and yield
• Solve complex integration issues using data from inline, defect, parametric, probe, reliability, and package‑level testing
• Partner across Process Integration, Process Development, Device Engineering, Package Design, Product Engineering, Reliability, Materials, and Manufacturing to develop and qualify new technologies
• Apply AI tools to data analysis, experiment planning, documentation, and technical problem‑solving

• BS in Electrical/Chemical/Mechanical Engineering, Materials Science & Engineering, Physics, or a related technical field with 5+ years semiconductor experience; MS in a related field with 4+ years of semiconductor experience; or PhD and 2+ years of semiconductor experience.
• Experience delivering technical results in process integration, process development, or device development, including experiment design, execution, and analysis
• Knowledge of semiconductor process integration and memory technologies such as DRAM, NAND, and/or emerging memory architectures
• Experience solving technical problems using data‑driven methods such as statistical analysis, Design of Experiments (DoE), and root‑cause analysis
• Experience leading technical projects, collaborating across functions, communicating complex technical information, and using AI tools to improve technical workflows

• Experience with advanced packaging technologies such as wafer‑level packaging, fan‑out packaging, 2.5D/3D integration, TSV, microbump, hybrid bonding, or chiplet integration
• Experience with Wafer‑Level Technology or reconstituted wafer flows, including die shift, warpage, thickness/TTV, edge integrity, defectivity, or handling
• Experience developing, qualifying, and transferring semiconductor processes or integration solutions to high‑volume manufacturing, including multi‑site development
• Experience with device or package reliability and test methodologies, including probe, final test, burn‑in, stress testing, or reliability qualification
• Experience…