Senior DRAM Verification Engineer – Boise

Micron Technology in Boise, Idaho is seeking an MTS Design Verification Engineer to lead DRAM verification for next‑generation memory products. You will shape verification strategy, guide methodologies, and collaborate with global teams to deliver high‑quality, scalable solutions. The role requires 8+ years in DRAM or CMOS verification, strong transistor‑level debugging, and experience with Verilog/System Verilog and HSPICE. Advanced degree and Python skills with AI-assisted tools are a plus.
This posting is for the Senior DRAM Verification Engineer – Boise role at Micron Memory Malaysia Sdn Bhd, based in Boise, , United States. This role, Senior DRAM Verification Engineer – Boise at Micron Memory Malaysia Sdn Bhd, could be your next opportunity. Are you ready to take on the Senior DRAM Verification Engineer – Boise role at Micron Memory Malaysia Sdn Bhd?