DRAM IP Design Engineer – RTL to GDS + AI Tools
Listed on 2026-10-07
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Engineering
Test Engineer, Electronics Engineer, Engineering Design & Technologists
Micron Technology, Inc. is seeking a Senior or Graduate Engineering Intern in DRAM IP Development to contribute to RTL-to-GDS design, verification, and silicon validation for next‑generation DRAM products.
You will gain hands‑on experience with industry‑standard EDA tools and AI‑assisted workflows. You will collaborate across multifunctional teams, analyze PVT across conditions, and present findings to leadership, while pursuing a relevant degree and building strong programming and analytical
Step into the DRAM IP Design Engineer – RTL to GDS + AI Tools role at 1000 Micron Technology, Inc. in Boise, , United States and grow with us.
The position is based in Boise, , United States.
This opportunity is part of our work in IT & Technology, Engineering.
The advertised compensation is 28.000 - 42.000.
We aim to respond to suitable candidates as soon as possible.
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