Senior Engineer, Advanced Packaging — Fail-Mode Metric Reaction; FMR) Boise, Idaho, Posted

** Job Description

Summary:

** We are seeking an experienced Fail-Mode Metric Reaction (FMR) Engineer to drive yield analysis, failure mode characterization, and failure mechanisms understanding across test vehicles and advanced packaging products. This role owns the reaction loop between defect signatures observed in the line and the corrective actions taken by process, build, and reliability partners — spanning time-zero defects, internal reliability fails, and customer RMA returns!

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* Job Description:

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* Key Responsibilities:

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* * Perform yield analysis for advanced packaging test vehicles and production products, producing clear breakdowns of defect signatures by fail mode, location, layer, and process step.
* Investigate and root-cause fail modes and fail mechanisms at time-zero, correlating electrical signatures with physical failure analysis findings.
* Drive reaction plans on internal reliability fails and customer RMAs, translating failure mechanism understanding into containment, corrective, and preventive actions.  
** Partner closely with:*
* * APTD Process teams — for process excursion triage and corrective action.
* APTD FA labs — for physical FA planning, sample prioritization, and interpretation.
* PSE (Product/Package Silicon Engineering) and TSE (Test/Silicon Engineering) teams — for test coverage, screen enhancement, and product-level dispositioning.
* Build and maintain data analysis pipelines, dashboards, and automated workflows that scale FMR response and shorten time-to-signature.
* Apply AI/ML techniques for signature classification, anomaly detection, and workflow automation.
* Present findings and reaction plans to leadership across multiple functions.  
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* Required Qualifications:

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* * MS or PhD or equivalent experience in Electrical Engineering, Materials Science, Physics, or a field closely aligned with these areas.
* 3–5 years of relevant industry experience in advanced packaging, failure analysis, yield engineering, or a closely related semiconductor field
* Demonstrated hands-on experience with advanced packaging fail modes (e.g., bump/interconnect, TSV, RDL, underfill, warpage, delamination, EM/TDDB-related package failures).
* Strong data analysis skills using Python, SQL, JMP, or equivalent tools to analyze high-volume manufacturing/test data, with experience applying AI/ML and automation techniques to enhance engineering workflows.
* Proven experience driving FA-to-fix loops with process and product teams.  
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* Preferred Qualifications:

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* * Familiarity with testing methodologies related to package fail modes, reliability stress methodologies (HTOL, TC, uHAST, etc.) and their failure signatures.

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.  We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.  

Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.  Additionally, Micron benefits include a robust paid time-off program and paid holidays.  For additional information regarding the Benefit programs available, please see the Benefits Guide posted on  is proud to be an equal opportunity workplace and is an affirmative action employer.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.