Senior IO Design Engineer Speed Clocking DRAM
Listed on 2026-10-18
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Engineering
Systems Engineer, Electronics Engineer
Micron Technology, Inc. in Boise, Idaho, seeks a Principal IO/Clocking Design Engineer to lead development of high-speed IO and clocking circuits for DRAM products, performing modelling, verification and optimization across full-chip and system levels.
The role emphasizes strong fundamentals in analog/mixed-signal design, Cadence and UNIX, collaboration with product engineering, SI, and process teams, and mentoring junior engineers.
We would love to welcome a new Senior IO Design Engineer – High-Speed Clocking for DRAM to our organisation in Boise, , United States.
Please review the full job details above before applying.
If your experience matches this role, we encourage you to apply.
All applications are reviewed carefully by our team.
The position is based in Boise, , United States.
This opportunity is part of our work in Engineering.
The advertised compensation is 150..
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