Quantum CryoCMOS Device Modeling Engineer

Global Foundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, Global Foundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit

Summary of Role

Global Foundries is seeking a Device Modeling Engineer with a core background in semiconductor device physics to develop, extract, validate, and deploy predictive models from room temperature to cryogenic temperatures. This role will translate measured behavior and device physics into simulation-ready compact models for transistors and models for superconducting and photonic elements, enabling cryoCMOS PDKs, quantum control and readout circuits, photonic design enablement, and differentiated foundry solutions.

Develop and calibrate physics-based compact models for CMOS and related transistor technologies across room-temperature and cryogenic operating regimes, including nominal, corner, and statistical model behavior.

Develop, calibrate, and validate simulation-ready models for superconducting and photonic elements using measured data, relevant physical mechanisms, and appropriate modeling frameworks.

Plan and execute parameter‑extraction and model‑validation workflows using electrical characterization data from device test structures and test chips.

Correlate model behavior with measured data, semiconductor device physics, relevant superconducting and photonic physics, and TCAD or other physics‑based simulation results; identify model limitations and drive corrective actions.

Define device and test‑structure requirements needed to extract, validate, and continuously improve models for cryogenic design enablement.

Integrate and qualify model files within PDK and EDA simulation environments, including regression testing, convergence checks, documentation, and release readiness.

Analyze temperature‑dependent device behavior, variability, mismatch, noise, and reliability effects and translate findings into practical guidance for circuit designers.

Collaborate with device engineering, technology development, characterization, PDK, EDA, and circuit‑design teams to establish model requirements and delivery priorities.

Communicate model assumptions, validation results, known limitations, and recommended usage through technical reports, model documentation, and design‑team reviews.

Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Work and collaborate on other projects and/or assignments as needed.

Education
- Bachelor’s degree in Electrical Engineering, Microelectronics, Physics, Applied Physics, or a related field.

Experience
- Minimum 5 years of experience applying semiconductor device physics to device modeling, transistor compact-model development, parameter extraction, device characterization, or closely related work. Final experience requirements should be aligned with GF scoping guidelines for the approved job level.

Strong background in semiconductor device physics and demonstrated understanding of transistor compact modeling and MOSFET electrical behavior, including short‑channel effects, leakage, capacitance, variability, and temperature dependence.

Demonstrated capability to develop or apply models for superconducting and photonic elements, including selection of appropriate physical effects, parameterization, validation, and deployment in circuit- or…