Signal and Power Integrity Engineer

About us At SPD Technology, we bring together a team of like-minded people who are driven by the desire to bring value through their work, united in their commitment to high performance and delivering custom, cutting-edge tech solutions that drive clients’ growth. We empower our people with a culture of excellence, and enable them with the opportunity to uphold their accountability to contribute on each level.

We value humanity and collaboration, encourage professional and personal growth, and foster a supportive and flexible work environment where everyone’s contribution is welcomed.

We are looking for a Signal Integrity/Power Integrity Engineer to join us as part of our team.

About the role

As a Signal Integrity/Power Integrity Engineer you will work to shape the future of AI/ML hardware acceleration by driving cutting-edge TPU (Tensor Processing Unit) technology that powers the most demanding AI/ML applications. You will be part of a team developing custom silicon solutions, leveraging your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

You will lead chip and package design, ensuring optimal SI/PI performance and system co-design from concept to production, while collaborating within a cross-functional team of Chip Design, IP, System Design, software, and vendors.

As a qualified expert You will

Lead signal integrity (SI) and power integrity (PI) analysis and optimization for High-Performance Computing (HPC) leveraging advanced 2.5D/3D packaging technologies.

Partner early in product definition to influence chip floor planning, power distribution networks (PDN/power trees), netlists, and routability tradeoffs.

Evaluate high-speed interface IPs and develop next-generation memory interfaces across IO PHY, SI/PI, and physical design boundaries.

Drive post-silicon validation and qualification for NPI, balancing SI/PI performance and DFM constraints to achieve final package design closure.

Partner closely with silicon, system, and external vendor teams while developing simulation methodologies to boost modeling accuracy and efficiency.

We’re looking for you if you have Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience in SI/PI design for chip/package or system PCB.Experience in industry SIPI modeling tool chains (e.g., HFSS, ADS, Sigrity, Siwave, etc.).

Experience with lab bring-up, test environments, and characterization for high-speed memory and Ser Des.

Experience with partnering across chip architecture, physical design, static timing analysis (STA), package, and validation teams.

Experience in Python, MATLAB, or C++ to establish automated flows and data processing tools.

Bonus points

Master’s degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.

Deep knowledge of SI/PI analysis for high-speed interconnects (HBMx, D2D/chiplets, PCIe, Ser Des) and timing budget methodologies.

Direct experience with silicon interposers, silicon bridges, and 3D die stacking architectures.

What’s in it for You Reveal great tech solutions

Join the team of experts who create custom, cutting-edge tech solutions for world-renowned businesses, fueling clients growth. Unleash your potential, tackle new challenges, and be part of a team that values your skills and contributions. Focus on long-term impact and building tailored, long-lasting partnerships with our clients.

Experience an agile and flexible working environment

Work fully remote around the globe, or in a hybrid work model from our office hubs which are equipped with everything…