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DMTS Design Engineer – Memory Architecture Leader

Job in Boise, Ada County, Idaho, 83701, USA
Listing for: Micron Technology, Inc
Full Time position
Listed on 2026-11-04
Job specializations:
  • Engineering
Salary/Wage Range or Industry Benchmark: 208000 - 416000 USD Yearly USD 208000.00 416000.00 YEAR
Job Description & How to Apply Below

Micron Technology, Inc. is seeking a Distinguished Member of Technical Staff (DMTS) Design Engineer to advance memory innovation in DRAM systems. Based in Boise,  San Jose, CA, you will shape architecture, drive performance improvements, and mentor teams in a technically visible leadership role.

The role anchors the Technical Leadership Program, requiring deep knowledge of DDR4/5 and memory systems, with cross-functional collaboration across firmware, hardware, and product groups.

We have an opening for a DMTS Design Engineer – Memory Architecture Leader in Boise, , United States within Engineering.

We invite applications for the DMTS Design Engineer – Memory Architecture Leader position located in Boise, , United States.

The following role is for a DMTS Design Engineer – Memory Architecture Leader with Micron Technology, Inc.

Our organisation is growing, and we are hiring a DMTS Design Engineer – Memory Architecture Leader in Boise, , United States.

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