Senior DRAM IO/Clock Design Architect — MTS
Listed on 2026-10-06
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IT/Tech
Engineering Design & Technologists, Systems Engineer -
Engineering
Engineering Design & Technologists, Systems Engineer, Electronics Engineer
Micron Technology, Inc. seeks a Principal/Member of Technical Staff (MTS) IO/Clock Design Eng to join the DRAM IP Design team for high-speed IP circuits used in Micron's DRAM products.
Relocation to Boise, Idaho is required; you will develop, verify, and optimize IO and clocking circuits, analyze timing, jitter and duty cycle impacts, and drive AI-assisted design methods. Responsibilities include modeling, simulation, and collaboration with process and data science teams to push performance in
We have an opening for a Senior DRAM IO/Clock Design Architect — MTS in Boise, , United States within IT & Technology.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior DRAM IO/Clock Design Architect — MTS role in the description above.
We appreciate your interest in this position.
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