Senior ASIC Packaging SI/PI Lead
Listed on 2026-10-26
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Engineering
Packaging Engineer, Systems Engineer
Cisco is seeking a highly qualified Signal and Power Integrity Technical Lead for our San Jose-based hardware engineering team. The role supports remote applicants within the United States and focuses on advancing ultra-high-speed signaling and robust SI/PI methods across ASIC packaging.
Responsibilities include leading design rule development, SI/PI analyses, and post-layout reporting, while mentoring engineers and driving cross-functional collaboration to meet performance goals.
This Full Time role is for the Senior ASIC Packaging SI/PI Lead role at Cisco.
This posting is for the Senior ASIC Packaging SI/PI Lead role at Cisco, based in Boston, MA, United States.
We are looking to fill the Senior ASIC Packaging SI/PI Lead position at Cisco in Boston, MA, United States.
The Senior ASIC Packaging SI/PI Lead role at Cisco is now open for applications in Boston, MA, United States.
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