PhD Research Internship

Boston, US | Full-time | Fixed-term| Hybrid

Salary: $55.70 per hour, DOE

Riverlane’s mission is to master quantum error correction (QEC) and unlock a new age of human progress. From advances in materials and climate science to complex chemistry simulation for new drug design, quantum computers will help humanity solve some of its most important challenges. But without QEC, the industry’s defining technical challenge, such breakthroughs can never be achieved. Riverlane is the world leader in QEC technology.

QEC is a complex problem that requires a range of skills, talent, and passion.

Having raised more than $125M in funding to date to accelerate our cutting-edge R&D in quantum error correction (QEC), Riverlane partners with many of the world’s leading quantum hardware providers and government agencies to make fault‑tolerant quantum computing a reality. We’re making remarkable progress and growing fast.

Delivering practical quantum error correction requires tightly integrated quantum and classical systems. The quantum hardware connectivity, its physical error rates, circuit compilation and compatible QEC codes all affect performance. On the classical side, decoding algorithms must process large volumes of error data within demanding latency, bandwidth, compute, and power constraints.

As a Research Intern, you will investigate simulating, running and decoding QEC experiments. Along with your supervisor, you will frame a research project. Your project will sit at the intersection of quantum error correction, computer simulations, computer architecture and hardware‑software co‑design.

Depending on the project, you could study noise models for quantum hardware, work on efficient simulations for QEC experiments, explore efficient QEC decoding or predecoding methods, model the classical resources required by fault‑tolerant quantum programs, or investigate how decoding workloads can be distributed across different levels of a computing system.

You will work alongside Riverlane’s quantum scientists and engineers in Cambridge, Massachusetts, with support from a dedicated supervisor. Your work will contribute to our understanding of how QEC systems can meet the performance requirements of increasingly large quantum computers.

• Develop algorithms, simulations or architectural models to evaluate potential approaches
• Investigate methods for reducing the compute, communication, memory, latency or power requirements associated with QEC
• Explore trade-offs between decoding performance, logical error suppression and classical resource requirements
• Collaborate with quantum scientists and engineers working across QEC theory, decoding, software and hardware
• Analyse results and communicate your findings through technical discussions, presentations and written reports
• Produce clear, reproducible research code and supporting documentation

• You must be currently pursuing a PhD in Physics, Mathematics, Computer Science, Computer Engineering, Electrical Engineering, or another related technical field
• Research experience in at least one of the following areas:
  • Running quantum circuits on quantum hardware
  • Decoding algorithms or quantum error‑correcting codes
  • Experience developing computational models, simulations or research software
  • Proficiency in Python, C, C++ or another relevant programming language
  • A strong understanding of computer systems and architecture
  • Computer architecture or quantum‑classical systems
  • Excellent analytical and problem‑solving skills
  • The ability to communicate complex technical ideas clearly
  • The ability to take initiative and work effectively with researchers and engineers from different disciplines
  • Authoriza…