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Senior CPU RTL Engineer; RISC‑V, Chisel
Job in
Brighton and Hove, Brighton & Hove, East Sussex, England, UK
Listed on 2026-09-09
Listing for:
SiFive, Inc.
Full Time
position Listed on 2026-09-09
Job specializations:
-
Engineering
Hardware Engineer
Job Description & How to Apply Below
Location: Brighton and Hove
A technology company specializing in CPU design is seeking a Senior RTL Design Engineer in Cambridge. You will be responsible for architecting and implementing features in RISC-V CPU core generators. The ideal candidate has 3+ years of design experience and a strong background in hardware design with Verilog/System Verilog or VHDL. Excellent collaboration skills and attention to detail are essential, and experience with tools like Git, Jira, and Confluence is preferred.
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Position Requirements
10+ Years
work experience
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