DFT Engineer
Listed on 2026-06-26
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Engineering
Test Engineer
Fractile is building silicon, systems and software which will redefine the frontier of AI: running the world’s most advanced models at radically higher speed and lower cost. We have an exceptional team across hardware and software capable of bringing about this change, and we are growing fast to meet demand and deliver our product at scale.
Join the team implementing DFT for a large, multi-core AI accelerator ASIC. You will work on scan, ATPG, and memory test, contributing to a robust and scalable test solution while developing your expertise in advanced SoC design.
Key Responsibilities- Contribute to the DFT architecture of a multi-core AI accelerator SoC
- Drive integration of DFT tools into the EDA flow
- Implement scan insertion, compression, and test logic
- Generate and analyze ATPG patterns for structural faults
- Support MBIST implementation for embedded memories
- Work with physical design to ensure clean scan chain implementation and timing closure
- Develop scripts and automation to improve DFT workflows
- Support silicon bring-up, debug, and test analysis
- Work with test and product engineering teams to bring up and debug ATPG patterns on ATE, supporting production test and yield ramp
- Degree in Electrical Engineering, Computer Engineering, or similar
- Experience in DFT, digital design, or related ASIC development
- Good understanding of scan, ATPG, memory BIST and digital test concepts
- Familiarity with mainstream EDA tools
- Scripting skills (Python, Tcl, or similar)
- Eager to learn and grow in DFT and large-scale ASIC design
- Detail-oriented and comfortable working with complex systems
- Collaborative and responsive in a fast-moving team
Certain roles may involve working on technologies subject to export restrictions. Applicants may be required to undergo additional eligibility checks to ensure compliance with applicable law.
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