Power Integrity & EMIR Engineer SoC Signoff
Listed on 2026-10-21
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Engineering
Electrical Engineering, Electronics Engineer, Systems Engineer, Test Engineer
Aion Silicon Ltd is seeking an EMIR/Power Integrity Engineer to join our SoC Physical Design team. You will perform PDN planning, EMIR verification, and signoff for advanced semiconductor designs, ensuring reliable power delivery through static and dynamic IR drop analysis.
You will collaborate with PD, CAD, RTL, package and reliability teams, develop automation flows in Tcl/Python, and contribute to signoff methodology and ECO implementations across 7nm/5nm nodes.
We invite applications for the Power Integrity & EMIR Engineer for SoC Signoff position located in West of England, England, United Kingdom.
The advertised compensation is 65.000 - 95.000.
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Power Integrity & EMIR Engineer for SoC Signoff role in the description above.
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