Senior Analog Layout Lead - Silicon
Listed on 2026-11-04
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Engineering
Electronics Engineer, Hardware Engineer
Meta's Silicon Engineering organization seeks an experienced Analog Layout Lead to drive the physical implementation of complex analog and mixed-signal circuits for custom chips powering VR/AR wearables. You will own full-custom layout, define methodologies, and collaborate with circuit design and verification to meet aggressive power, performance, and area targets.
You will lead layout of PLLs, ADCs, DACs, LDOs, and high-speed I/O, establish floor plans, mentor engineers, and drive DRC/LVS and
We are looking to fill the Senior Analog Layout Lead for High-Performance Silicon position at Meta in Burlingame, CA, United States.
We invite applications for the Senior Analog Layout Lead for High-Performance Silicon position located in Burlingame, CA, United States.
The following opportunity is for a Senior Analog Layout Lead for High-Performance Silicon with Meta.
Our organisation is growing, and we are hiring a Senior Analog Layout Lead for High-Performance Silicon in Burlingame, CA, United States.
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