Job specializations:
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Engineering
Job Description & How to Apply Below
Support complex SoC development through formal verification, RTL-to-GDS sign-off, and debugging across multiple design stages.
This LEC CAD Engineer develops and supports methodologies that verify functional correctness between RTL, synthesized netlists, and physical designs. The position manages flow requirements, enables Engineering Change Order implementation, and investigates non-equivalences. It also includes automation with Tcl, Python, Perl, or Shell and collaboration with EDA vendors.
Key Responsibilities:- Maintain RTL-to-GDS and gate-to-gate sign-off flows
- Implement ECO methodologies for late-stage design changes
- Analyze non-equivalences, aborts, and design mismatches
- Develop scripts and automation infrastructure for verification
- Partner with EDA vendors on tool optimization
- Knowledge of Cadence Conformal LEC and ECO
- Knowledge of Synopsys Formality
- Bachelor's or Master's degree in Electrical Engineering
- Computer Science or related academic background
- Dedicated hardware or EDA experience
Bring LEC methodology, ECO implementation, automation, and root-cause analysis skills to complex SoC verification flows.
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