UVM Digital Verification Engineer – FPGA​/ASIC Innovation

A nonprofit research and development company in Cambridge, MA, is seeking a motivated UVM Digital Verification Engineer. You will tackle novel verification challenges in FPGAs and ASICs, applying modern strategies to complex designs. The ideal candidate has a strong background in integrated circuit design, preferably with 3-5 years of experience.

This role offers a salary range between $75,000 and $150,000, plus extensive benefits aimed at promoting a healthy work-life balance.
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