Senior Verification Engineer, Coherent Interconnect

SiFive, Inc. is seeking a Senior Staff Design Verification Engineer to lead the verification of cache-coherent interconnect subsystems. The role focuses on defining strategy, identifying risks, and solving verification challenges in high-performance SoCs.

Applicants should have a strong background in System Verilog, ASIC design verification, and must be able to work collaboratively across various teams to drive high technology standards.

This position provides competitive compensation and a comprehensive benefits package.

The following opening is for a Senior Staff Verification Engineer, Coherent Interconnect with SiFive, Inc.

Learn more about the Senior Staff Verification Engineer, Coherent Interconnect role in the description above.

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