UVM Digital Verification Engineer — FPGA/ASIC
Listed on 2026-10-18
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Engineering
Hardware Engineer, Test Engineer, Electronics Engineer
Draper, a Cambridge, MA-based nonprofit R&D organization, seeks a motivated UVM Digital Verification Engineer to tackle challenging verification for FPGAs and ASICs. You will develop verification strategies, build UVM-based test benches, and collaborate with RTL teams to ensure robust, secure hardware designs.
You will work in a multidisciplinary environment, contributing to embedded security, cryptography, and signal processing projects.
As a UVM Digital Verification Engineer — FPGA/ASIC, you will play an important part at Draper in Cambridge, MA, United States.
Take a moment to read everything above and see whether this role is right for you.
This posting is for the UVM Digital Verification Engineer — FPGA/ASIC role at Draper, based in Cambridge, MA, United States.
We are looking to fill the UVM Digital Verification Engineer — FPGA/ASIC position at Draper in Cambridge, MA, United States.
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