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Senior Analog and RF Designer

Job in Cambridge, Cambridgeshire, CB21, England, UK
Listing for: Palma Ceia SemiDesign
Full Time position
Listed on 2026-01-30
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Electrical Engineering
Job Description & How to Apply Below

Overview

Palma Ceia Semi Design, Inc. (PCS) is a fabless semiconductor company offering modem chips, transceivers, systems and IP for emerging Internet of Things (IoT) and Machine-to-Machine (M2M) Wi-Fi and cellular RF markets. Palma Ceia Semi Design is seeking senior analog and RF IC design engineers to join their team of experienced radio design engineers in Cambridge, UK. Successful candidates will show a strong understanding of circuit design principles as well as an ability to work autonomously.

A premium will be placed on having a strong portfolio of high-performing radio circuit designs and a desire to continually learn and excel.

Responsibilities
  • Ownership of the design of analog and RF circuit components within a SoC environment.
  • Specification and architecture definition
  • Detailed circuit design, verification and physical implementation
  • Behavioral modeling of circuit functionality
  • Integration of circuit design into IC
  • Characterization, debug final test and productization.
  • Peer review of colleagues’ work
  • Collaboration with other IC design disciplines: system design, digital design, ATE test, software development and applications engineering
Required Experience
  • Bachelor’s degree in electronic engineering or a related subject
  • Design of deep sub-micron CMOS analog and RF circuits
  • Work on WiFi, BT, NB-IoT or cellular radio standards
  • Knowledge of a range of circuit architectures; for example, LNA, PA, PLL, Mixers, Filters, ADC, DAC, LDO
Desirable Experience
  • Master’s degree or higher
  • System design and integration at the SoC level
  • Leadership of radio sub-system (e.g., RX, TX, etc) design and implementation
  • Definition and implementation of SoC infrastructure (e.g., Power management, clock generation etc)
  • Design, implementation and test of ESD infrastructure on SoC
  • Tape-out process
  • Package and PCB design and implementation
  • PDK development and CAD support
  • E&M modeling of SoC, package and PCB structures
Additional Information
  • Job Site:
    Cambridge, UK
  • Email resumes to:
  • No calls. EOE.
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Position Requirements
10+ Years work experience
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