Senior Verification Engineer, ASIC/FPGA & SystemVerilog
Listed on 2026-10-16
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Engineering
Test Engineer, Hardware Engineer, Electronics Engineer, Systems Engineer
YOH SOLUTIONS LTD is seeking a Senior Verification Engineer to join its engineering team in Cambridge, UK. You will verify complex RTL designs in a collaborative ASIC/FPGA environment, ensuring functional and performance targets are met before production hardware.
You will lead verification planning, develop System Verilog/UVM test benches, and mentor junior engineers while coordinating with design and systems teams across project life cycles.
This position is for the Senior Verification Engineer, ASIC/FPGA & System Verilog role at YOH SOLUTIONS LTD.
The position is based in Cambridge, England, United Kingdom.
This opportunity is part of our work in IT & Technology, Engineering.
The advertised compensation is 70..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior Verification Engineer, ASIC/FPGA & System Verilog role in the description above.
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