Lead Hardware Design Architect; FPGA/ASIC Hybrid
Listed on 2026-11-01
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Engineering
Hardware Engineer, Electronics Engineer -
Design & Architecture
Acceler Comm Ltd in Cambridge is seeking a Design Team Leader to drive the hardware design of next-generation baseband and signal processing IP for 5G and space-qualified devices. You will lead a cross-disciplinary team of engineers, shaping the technical roadmap and delivering high‑quality RTL designs on FPGA and ASIC.
The role is hands-on with a strong focus on mentoring, timely project delivery, and collaboration with algorithm, system architecture and software teams.
We are seeking a motivated Lead Hardware Design Architect (FPGA/ASIC) — Hybrid to join Acceler Comm Ltd in Cambridge, England, United Kingdom.
We have an opening for a Lead Hardware Design Architect (FPGA/ASIC) — Hybrid in Cambridge, England, United Kingdom within Marketing & Media, Engineering.
This role, Lead Hardware Design Architect (FPGA/ASIC) — Hybrid at Acceler Comm Ltd, could be your next move.
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