Senior RTL Architect PCIe/CXL Interconnects
Job in
Cardiff, Cardiff City Area, CF10, Wales, UK
Listed on 2026-09-05
Listing for:
Arm Limited
Full Time
position Listed on 2026-09-05
Job specializations:
-
Engineering
Test Engineer, Systems Engineer, Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
Arm Limited is seeking an experienced RTL/SoC engineer to own microarchitecture and RTL development for high-speed interconnect subsystems, including PCIe, CXL, and UALink. You will translate requirements into microarchitecture specifications and synthesizable RTL, driving integration across multiple silicon products.
You will lead the development process from concept through RTL creation, subsystem integration, verification support, and final delivery, collaborating with architecture,
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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