ASIC Design Verification Engineer

ASIC Design Verification Engineer I (Full Time) - United States

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Please note this posting is to advertise potential job opportunities. Applications are accepted until further notice.

The ASIC Group works closely with other development teams within Cisco, including marketing, system hardware, software, product engineering, and manufacturing.

Join our award-winning ASIC team, where you’ll collaborate with top industry talent to design and deliver ground-breaking communications and network processing silicon. You’ll contribute to system and processor architecture, high-speed logic design and verification, digital signal processing, memory and custom library development, physical design, DFT, signal integrity, and advanced packaging.

• Completion within the past 3 years, or current enrollment with expected completion within 12 months, of a Bachelor’s degree program. Familiarity with hardware description languages (HDLs), such as Verilog or VHDL.
• Experience with RTL design and simulation tools (e.g., Synopsys, Cadence, Mentor Graphics).
• Exposure to scripting languages (e.g., Python, Perl, TCL) for automation.
• Familiarity with ASIC/SoC design flow including synthesis, place & route, and timing closure.

• Experience with ASIC verification methodologies (e.g., UVM, System Verilog)
• Understanding of physical design and DFT (Design for Test) principles
• Familiarity with Linux-based development environments
• Ability to adapt to new technologies and problem-solve sophisticated engineering challenges
• Excellent organizational, teamwork, and communication skills