Design Verification Technical Leader

The application window is expected to close on: 11/23/2026

The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly.

Join us to power the future of the digital world.

As part of Cisco’s industry-defining Silicon One Optics group, you won’t just follow the future of networking—you’ll engineer it. We are actively building the hyper-scalable optical transceivers and modules (800G, 1.6T, and beyond) powering the world’s most demanding AI/ML workloads and next-gen data centers.

As our Design Verification Technical Leader, you’ll step straight into the driver’s seat. You will lead the verification of high-speed silicon photonics driver ICs (pushing 100/200/400G per Lambda) directly integrated across Cisco’s flagship routing, switching, and data center platforms. The AI infrastructure boom is happening right now—this is your opportunity to lead the silicon innovations making it possible before the rest of the industry catches up.

• Define and lead verification methodology and standards across multiple projects, coordinating activities across multiple sites.
• Lead verification at block & chip level with various high-speed IPs integrated like ODSP, D2D IP, Ser Des XSR/PAM4, Integrated drivers/TIA, and control functions.
• Review specifications, participate in design reviews, and influence architecture for testability and verification efficiency.
• Mentor and coach verification engineers, driving continuous improvement in technical skills and execution.
• Debug complex silicon and system-level issues during bring-up phases.
• Support post-silicon bring-up and optimize integration and performance.

• Bachelor’s degree in Electrical or Computer engineering and 8+ years of ASIC Design Verification experience, or Master’s degree in Electrical Engineering or Computer Engineering and 6+ years of ASIC Design experience, or PhD in Electrical Engineering or Computer Engineering + 3 years in ASIC Design Verification experience.
• Experience in System Verilog, UVM, and verification methodologies
• Experience owning and delivering verification for large-scale SoCs or subsystems.
• Experience leading verification teams or projects.
• Experience in scripting and automation such as Python, Perl, TCL, or Shell Scripts.

• Strong experience with UVM (Universal Verification Methodology) for developing scalable, reusable, and coverage-driven verification environments.
• Expertise in verification of Ser Des IP, D2D PHY IP, ODSP & integrated transceiver features, CPU sub-system & Protocols (Ethernet, UCIE, UAL, SPI/I2C, etc.)
• Experience influencing design for testability and verification.
• Proven experience in troubleshooting and debugging.
• Experience with Formal Verification, hardware description languages (HDLs) such as Verilog/System Verilog)
• Experience with emulation and prototyping platforms (Veloce, HAPS).
• Experience collaborating with architecture and design teams on verification strategy.

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These…