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Director - Engineering, Speed SerDes & Analog​/Mixed-Signal; Silicon One Optics Group

Job in Carlsbad, Eddy County, New Mexico, 92002, USA
Listing for: Cisco
Full Time position
Listed on 2026-10-11
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 221000 - 292000 USD Yearly USD 221000.00 292000.00 YEAR
Job Description & How to Apply Below
Position: Director - Engineering, High Speed SerDes & Analog / Mixed-Signal (Silicon One Optics Group)

The application window is expected to close on: 10/08/2026

Meet the Team

The Director will be responsible for setting up and leading a high-performance engineering design team in the US & India for Cisco’s Client Optics Group (COG) and driving the end-to-end execution of optical transceiver development for COG’s silicon-photonics–based transceiver chipsets and modules. Key responsibilities include architecture, development, simulation, diagnostics, bring-up, and validation of electronics IC (EIC) paired with silicon photonics ICs (PICs).

A significant new focus for this role is the deployment of AI tools, when possible, to enhance productivity, quality, and development cycle times.

Your Impact Product Planning
  • Evaluating Marketing Requirements Documents (MRDs) and providing timely responses as to the approach, timeline, and feasibility for new product concepts.
  • Significant participation in Cisco’s product lifecycle (PLC) process including Concept Commits (CCs), Engineering Commits (ECs) and other important PLC milestones.
  • Working with the COG Program Management Team to develop and maintain accurate, detailed, and comprehensive program schedules and resource plans.
  • Drive adoption of AI tools to enhance productivity, quality, and development speed.
Silicon Development
  • Oversee the design, development, delivery, and documentation of electronics ICs, and chipsets by working directly with the various team leaders to guarantee execution with predictability, velocity and quality.
  • Ensure the Analog Design team is following best engineering practices in the development, custom layout, simulation, validation/characterization, & documentation of the optical transceiver designs being developed.
  • Apply analytics and AI/ML to stimulate edge cases, optimize test strategies, and improve test coverage, usability, debug capabilities, and fault isolation.
Collaboration & Team Development
  • Partner with the cross functional teams like digital design, SI/PI, layout, Silicon characterization, Product Management, and Operations teams to ensure multi-functional alignment and successful program delivery.
  • Foster a collaborative, innovative, accountable, and inclusive culture, promoting guidelines and knowledge sharing across global teams.
  • Mentor and develop high-performing teams, emphasizing continuous learning in silicon development and effective use of AI-assisted development tools.
Who You Are
  • Experienced large-team leader who can motivate its members to successful outcomes.
  • Expert in the development of mixed-signal/analog electronics and silicon photonics with a proven track record of timely delivery and first-pass success.
  • Advocate for AI tools, with a history of driving adoption to accelerate development and improve productivity.
  • Skilled collaborator and mentor, committed to building high-performing, innovative teams.
Minimum Qualifications
  • 15+ years high-speed electronics and experience including management of global teams.
  • Advanced degree (Master’s/PhD) in Electrical/Computer Engineering, Physics, or related field work experience with a focus on semiconductor and/or optics development.
  • Extensive experience in the following disciplines:
    • Mixed signal/analog electronics:
      Drivers, TIAs, ADCs, TX/RX Equalizers, CDRs, etc.
    • Digital signal processors (DSP)
    • Optical / Photonic ICs or similar:
      Modulators, Photo Detectors, Grating Couplers, Waveguides, etc.
    • High-speed SERDES- 112

      Gbps, 224

      Gbps, 448

      Gbps PAM4/PAM6
    • Signal & power integrity, channel modeling
    • Advanced packaging including fine-pitch and low-parasitic chip-chip interconnect
    • PLL / clock domains and distribution
    • Power distribution
    • Silicon diagnostics, test coverage, and DFT
    • Electrical, optical, and co-simulation applications and tools
    • Silicon validation and test equipment
Preferred…
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