Senior DFT Lead ASIC Test & Post-Silicon Debug
Listed on 2026-10-17
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Engineering
Test Engineer, Hardware Engineer, Electronics Engineer
itD is seeking a DFT Lead to drive advanced Design-for-Test solutions across the silicon lifecycle. The role requires deep expertise in ASIC DFT, post-silicon validation, and test architecture, with a track record of production-ready silicon delivered through cross-functional collaboration.
Location options include hybrid Carlsbad, CA or Allentown, PA, or US remote, with Pacific Time business hours. This 14-month engagement includes comprehensive medical, a 401k plan, paid holidays, and more;
We are seeking a motivated Senior DFT Lead for ASIC Test & Post-Silicon Debug to join Itdtech in Carlsbad, CA, United States.
For the Senior DFT Lead for ASIC Test & Post-Silicon Debug position at Itdtech, we are reviewing applications now.
Step into the Senior DFT Lead for ASIC Test & Post-Silicon Debug role at Itdtech in Carlsbad, CA, United States and grow with us.
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