Senior ASIC Packaging SI/PI Lead 5D Speed
Listed on 2026-10-18
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Engineering
Packaging Engineer, Hardware Engineer, Electronics Engineer
Cisco Silicon One seeks a highly qualified Signal and Power Integrity Technical Lead to shape, design, and verify next-generation ASIC packaging. You will drive ultra-high-speed signal integrity, collaborate with layout and packaging teams, and lead complex SI/PI analyses across interposer, substrate, and PCB contexts.
Join a world-class ASIC team delivering cutting-edge solutions across high-performance networks and data centers, with opportunities to mentor engineers and influence hardware
We would love to welcome a new Senior ASIC Packaging SI/PI Lead — 2.5D & High-Speed to our team in Cary, NC, United States.
Are you ready to take on the Senior ASIC Packaging SI/PI Lead — 2.5D & High-Speed role at Cisco?
We would love to welcome a new Senior ASIC Packaging SI/PI Lead — 2.5D & High-Speed to our group in Cary, NC, United States.
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