Senior ASIC/FPGA Engineer - RTL, Timing & Integration
Listed on 2026-10-18
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Engineering
Systems Engineer, Electronics Engineer, Hardware Engineer, Test Engineer
Collins Aerospace in Cedar Rapids, IA, is seeking a senior digital design engineer to capture requirements and design, implement, verify, and integrate digital ASICs, FPGAs, and circuit boards, including RTL architecture, timing closure, and system integration. Candidates must hold a STEM degree with at least five years of relevant experience (or an advanced degree with at least three years), U.S.
citizenship, and an active Secret clearance after day one.
We invite applications for the Senior ASIC/FPGA Engineer - RTL, Timing & Integration position located in Cedar Rapids, IA, United States.
Are you ready to take on the Senior ASIC/FPGA Engineer - RTL, Timing & Integration role at Collins Aerospace?
We would love to welcome a new Senior ASIC/FPGA Engineer - RTL, Timing & Integration to our group in Cedar Rapids, IA, United States.
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