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Senior FPGA Engineer — Satellite Communications & Secure Links

Job in Chandler, Maricopa County, Arizona, 85249, USA
Listing for: Edison Smart®
Full Time position
Listed on 2026-10-11
Job specializations:
  • Engineering
    Systems Engineer, Telecoms Engineering, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 105000 - 175000 USD Yearly USD 105000.00 175000.00 YEAR
Job Description & How to Apply Below

Edison Smart® in Chandler, AZ is seeking a Senior FPGA Engineer to join a small team and own end-to-end development of complex FPGAs for satellite communications systems.

The on-site role requires US citizenship or a Green Card. You will contribute with RTL simulations, FPGA implementation, and work with Xilinx-based designs to deliver secure communications capabilities for public safety and emergency services.

The following opening is for a Senior FPGA Engineer — Satellite Communications & Secure Links with Edison Smart®.

This opportunity is part of our work in Engineering.

The advertised compensation is 105..

We aim to respond to suitable candidates as soon as possible.

Full responsibilities and requirements are described in the listing above.

Learn more about the Senior FPGA Engineer — Satellite Communications & Secure Links role in the description above.

Position Requirements
10+ Years work experience
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