Senior FPGA Digital Engineer; Secret Clearance

Northrop Grumman Space Systems in Chandler, AZ is seeking a Staff FPGA Digital Engineer to support the EO Group within Launch Vehicles. You will apply advanced FPGA engineering principles, lead design challenges, and develop high-level test benches for timing-critical FPGA designs.

The role requires mastery of VHDL/Verilog, extensive Xilinx FPGA/SoC experience, and verification with OSVVM/UVM and Questa/Model Sim. Travel up to 10% may be required and DoD Secret clearance is required.

We are looking to fill the Senior FPGA Digital Engineer (Secret Clearance) position at Northrop Grumman in Chandler, AZ, United States.

The Senior FPGA Digital Engineer (Secret Clearance) position in the Engineering field is open for applications.

We have an opening for a Senior FPGA Digital Engineer (Secret Clearance) in Chandler, AZ, United States within Engineering.

This role, Senior FPGA Digital Engineer (Secret Clearance) at Northrop Grumman, could be your next career step.