Senior FPGA Design Engineer – Secret Clearance
Listed on 2026-11-05
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Engineering
Systems Engineer
Northrop Grumman Space Systems in Chandler, AZ is seeking a Staff FPGA Digital Engineer to support the EO Group in Launch Vehicles. You will apply advanced FPGA engineering to cross-disciplinary teams and lead design and verification efforts for high-reliability space systems.
The role requires strong VHDL/Verilog skills, experience with AMD Xilinx FPGAs, and a DoD Secret clearance. Relocation assistance is available and the position is on-site in Chandler, AZ.
Are you ready to take on the Senior FPGA Design Engineer – Secret Clearance role at Northrop Grumman?
This posting is for the Senior FPGA Design Engineer – Secret Clearance role at Northrop Grumman, based in Chandler, AZ, United States.
We are looking to fill the Senior FPGA Design Engineer – Secret Clearance position at Northrop Grumman in Chandler, AZ, United States.
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