Senior Staff Engineer in Physical Design

Drive innovation at Infineon as a Senior Staff Engineer in the Physical Design team, focusing on advanced low-power SoCs with an emphasis on timing analysis and constraints development.

This position requires a minimum of 8 years of hands-on experience in timing analysis and closure for large SoCs. You will manage constraints and ensure timing convergence across various modes while collaborating closely with the physical design team for optimal results.

Your role includes mentoring junior engineers and overseeing synthesis and equivalence checks.

Key Responsibilities:

• Lead STA and timing closure for complex So Cs

• Own constraint development for test modes pre/post layout

• Conduct timing analysis across multiple design corners

• Collaborate with physical design teams for SI closure

• Mentor on synthesis and equivalence checks

Requirements:

• 8+ years of experience in timing closure and constraints development

• Proficiency in industry-standard timing signoff tools

• Skilled in scripting (shell, perl, tcl)

• Knowledge of 22nm/28nm/40nm tech and timing challenges

• Experience in low-power design techniques

Leverage your expertise to optimize low-power design solutions at Infineon.
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