Senior FPGA Design Engineer

Senior FPGA Design Engineer page is loaded## Senior FPGA Design Engineer remote type:
Onsite Required locations:
Clearfield, UTtime type:
Full time posted on:
Posted 3 Days Agojob requisition :
JR002063
** Overview:
** Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas necessary for true innovation.

For more information about Draper, visit .
** Job Description

Summary:

** A Senior ASIC Hardware Engineer specifies, designs, verifies, tests, and documents Application-Specific Integrated Circuits. The engineer develops the architecture, designs circuits and/or HDL, performs simulations, performs physical layout, verifies and tests designs.
*
* Job Description:

**** Duties/Responsibilities
*** Design and simulate circuits at transistor-level to implement architecture and requirement specifications
* Contribute to system-level design
* Optimize hardware designs for performance, power, and cost
* Evaluate the hardware feasibility of complex algorithms and requirements
* Independently contribute to complex chip architectures and designs
* Independently drive solutions to complex problems - develop requirements, propose ways forward when customer requirements are unclear or incomplete, and adapt appropriately to changes in requirements
* Contribute to business development and proposal activities
* Develop, document, and teach best practices to less experienced engineers
* Perform or guide physical layout, including floor-planning, and simulate circuits using extracted parasitics, contribute to design-for-test development.
* Perform other duties as assigned
** Skills/Abilities
*** Proficiency in integrated circuit design
* Understanding of integrated circuits, semiconductors, and general computer architecture
* Ability to write detailed design specifications
* Ability to lead multi-disciplinary technical teams
* Excellent verbal and written communication skills
* Excellent mathematical skills
* Excellent organizational skills and attention to detail
* Excellent time management skills with the proven ability to meet deadlines
* Strong analytical and problem-solving skills
* Ability to prioritize tasks
* Demonstrate strong organization, planning, and time management skills to achieve program goals
** Education
* * Requires a bachelor's degree in Engineering, or related field. Masters degree preferred.
** Experience
* * Requires 7-10 years of experience with a bachelor's degree, or 5-10 years of experience with a master's degree in ASIC Hardware Engineering or related.
*
* Preferred Qualifications:

*** Experience with low power circuit design
* Experience with CMOS advanced nodes below 32nm
* Experience with radiation-hardened electronics
** Additional

Job Description:

** Applicants selected for this position will be required to obtain and maintain a government security clearance

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** Job Location - City:
** Clearfield
* * Job Location - State:
** Utah
* * Job Location - Postal Code:
** 84015

The US base salary range for this full-time position is $82,300.00 - $
* Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations.
* * Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Union ranges will be in compliance with the collective bargaining agreement's approved rates by location and role. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.  Please note that the compensation…