Principal​/Senior Principal ASIC DFT Engineer Security Clearance

Position: Principal/ Senior Principal ASIC DFT Engineer with Security Clearance
Location: Aurora

RELOCATION ASSISTANCE:
Relocation assistance may be available CLEARANCE TYPE: SCI TRAVEL:
Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon.

We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.

Northrop Grumman Mission Systems is a trusted provider of mission-enabling solutions for global security. Our Engineering and Sciences (E&S) organization pushes the boundaries of innovation, redefines engineering capabilities, and drives advances in various sciences. Our team is chartered with providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter.

Come be a part of our mission! The Northrop Grumman Mission Systems (NGMS) pushes the boundaries of innovation. It redefines the leading edge of exotic new technologies and drives advancements in the sciences. One of our most challenging new fields is Transformational Computing, which combines the unique properties of superconductivity and quantum mechanics to develop radical new energy-efficient computing systems.

Our team is chartered with providing the skills to transform computing beyond Moore's Law, advancing development of computer architectures, processing/memory subsystems, and large-scale high-performance computing systems. You will be part of a team alongside a broad array of scientists and engineers working to make these processing solutions a reality. This position will be 100% onsite in Linthicum, MD, Beavercreek, OH or Aurora, CO.

Candidate MUST be a US Citizen and have the ability to obtain and maintain an active clearance.

Roles and Responsibilities:

* Responsible for DFT (Design for Testabilty) aspects of ASIC Design thorough understanding of digital design concepts
* Responsible with ASIC development process.
* Knowledgeable in VHDL, Verilog or System Verilog RTL coding and be highly proficient in DFT methodologies.
* Responsible for operating in a team environment and collaborate across the different teams as required to accomplish the goals. Principal Engineer

Basic Qualifications:

* Bachelor's degree with 5 years of experience, a Master's degree with 3 years of experience or a Ph.D. with 1 years of experience in Science, Technology, Engineering, Mathematics, or related technical fields; an additional 4 years of experience may be considered in lieu of a degree.
* U.S. Citizenship is required
* Ability to obtain/maintain a clearance once hired
* Experience in full product life cycle of ASIC Design
* Experience with Cadence and/or Mentor test insertion and ATPG tools
* Experience with hierarchical scan testing, IEEE-1500 and/or IEEE-1687, test compression, JTAG IEEE-1149.1 and IEEE-1149.6 (AC JTA
* Experience with memory BIST and logic BIST
* Experience generating test patterns and analyzing and debugging test failures
* Experience working with test engineers to implement ATPG vectors on tester hardware
* Proficiency in HDL (VHDL/Verilog/System Verilog) and scripting languages such as Tcl, Python or Perl
* Effective communication and presentation skills and high proficiency in technical problem solving

Preferred Qualifications:

* Master's Degree in Electrical or Computer Engineering
* Knowledge of Synthesis, P&R and Static Timing Analysis would be a plus
* Active Clearance or higher Senior Principal Engineer

Basic Qualifications:

* Bachelor's degree with 8 years of experience, a Master's degree with 6 years of experience or a Ph.D. with 4 years of experience in Science, Technology, Engineering, Mathematics, or related technical fields; an additional 4 years of experience may be considered in lieu of a degree.
* U.S. Citizenship is required
* Ability to obtain/maintain a security clearance once hired
* Experience in full product life cycle of ASIC Design
* Experience with Cadence and/or Mentor test insertion and ATPG tools
* Experience with hierarchical scan testing, IEEE-1500 and/or IEEE-1687, test compression, JTAG IEEE-1149.1 and IEEE-1149.6 (AC JTA
* Experience with memory BIST and logic BIST
* Experience generating test patterns and analyzing and debugging test failures
* Experience working with test engineers to implement ATPG vectors on tester hardware
* Proficiency in HDL (VHDL/Verilog/System Verilog) and scripting…