Senior ASIC DFT Architect & Debug Lead
Listed on 2026-10-09
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Engineering
Hardware Engineer, Test Engineer, Systems Engineer
Sapsol Technologies Inc. seeks a Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs.
You will own DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation while guiding cross-functional debug teams to resolve silicon issues. The ideal candidate has deep DFT fundamentals, fault models, test coverage, and the ability to evaluate emerging methodologies to improve robustness, quality,
The following position is for a Senior ASIC DFT Architect & Debug Lead with Sapsol Technologies Inc.
The Senior ASIC DFT Architect & Debug Lead role at Sapsol Technologies Inc is now open for applications in United States.
Join us at Sapsol Technologies Inc as our next Senior ASIC DFT Architect & Debug Lead in United States.
We are currently recruiting a Senior ASIC DFT Architect & Debug Lead for our team in United States.
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